Workshop Overview: The 2nd IEEE Chiplet Workshop: Circuits and Systems for Next-Generation AI Computing (CSNAIC) is an international event sponsored by the IEEE Circuits and Systems Society (CASS) as a satellite event of AICAS 2026. This year, the workshop will take place in September 2026 at Ha Long Bay, Vietnam, and in October 2026 at Shanghai, China. The workshop aims to bring together researchers and industry experts to discuss emerging challenges and innovative solutions in chiplet-based architectures, advanced circuits and systems, and EDA technologies for next-generation AI computing. Particular emphasis will be placed on heterogeneous integration, high-performance interconnects, advanced packaging technologies, and standardization efforts for scalable and energy-efficient chiplet systems.

Submission Guidelines

• Format: A 1-page poster-style PDF, utilizing the official template available at https://2025.ieee-isicas.org/program/CWposter.pptx.
• Eligibility: We welcome original work, including preprints, recently published papers in CASS journals, or works presented at top-tier conferences. To foster innovation, submissions of unpublished research are highly encouraged. All submissions will undergo peer review based on quality and thematic relevance.
• Travel Support for Accepted Papers: To encourage broader participation, authors of accepted papers who attend the workshop in Shanghai will be eligible for travel support of RMB 800 for participants from Asia (excluding China) and RMB 1,500 for participants from outside Asia.
• Publication & Copyright: Accepted papers will be featured exclusively in the Workshop Poster Digest (hard copy only). As no formal proceedings will be published and no copyright transfer is required, this will not preclude future submissions to other venues.
• Submission Portal: https://easychair.org/my/conference?conf=icw2026.

For further inquiries, please contact: secretary.chiplet.workshop@gmail.com.